1. Field of the Invention
The present invention relates to a reference voltage generating circuit, and more specifically to a reference voltage generating circuit of efficiently generating a plurality for reference voltages.
2. Description of Related Art
A reference voltage generator stably generates a voltage to be used as a reference, and supplies the reference voltage to a circuit which is internally provided in a semiconductor device and which needs the reference voltage. The reference voltage generator is required to generate a voltage which is always constant even if a variation occurs in an operating condition such as a voltage supply voltage and temperature. Ordinarily, in other words, the reference voltage generator cannot generate a varying voltage.
Since a reference voltage generator can generate only the constant voltage, it is the prior art practice that a differential amplifier and resistors are used in order to generate a desired voltage from the generated constant voltage, disclosed in for example Japanese Patent Application Pre-examination Publication No. JP-A-62-274909, (an English abstract of JP-A-62-274909 is available from the Japanese Patent Office and the content of the English abstract of JP-A-62-274909 is incorporated by reference in its entirety into this application).
Referring to FIG. 1, there is shown a circuit diagram disclosed in JP-A-62-274909. In the shown prior art reference voltage generating circuit, a reference voltage generator 1 generates a reference voltage V.sub.ref which is at a constant even if a variation occurs in an operating condition including a voltage supply voltage and a temperature. The reference voltage V.sub.ref is supplied to a non-inverted input of a differential amplifier 2, which has an output fed back to an inverted input of the differential amplifier 2 through a selected one or ones of series-connected resistors R.sub.1 to R.sub.64 in a selection circuit 3. The selection circuit 3 includes a number of selection transistors Q.sub.101 to Q.sub.364 connected as shown between the inverted input of the differential amplifier 2 and 64 connections nodes N.sub.1 to N.sub.64 of the series-connected resistors R.sub.1 to R.sub.64, in order to connect a selected one of the connections nodes N.sub.1 to N.sub.64 of the series-connected resistors R.sub.1 to R.sub.64, to the inverted input of the differential amplifier 2. For this purpose, the selection circuit 3 also includes a decoder circuit DEC and inverters IV.sub.3 and IV.sub.4, which receives control signals T1 to T6 to selectively turn on the selection transistors Q.sub.101 to Q.sub.364. Thus, it is possible to arbitrarily select an voltage dividing ratio of the output voltage V.sub.ref2 of the differential amplifier 2, by the control signals T1 to T6, and therefore, to arbitrarily set the output voltage V.sub.ref2.
Referring to FIG. 2, there is shown a simplified circuit diagram of a portion of the prior art reference voltage generating circuit excluding the reference voltage generator 1. In a simplified circuit 60 shown in FIG. 2, V.sub.O corresponds to V.sub.ref in FIG. 1, and V.sub.ref corresponds to V.sub.ref2 in FIG. 1. A differential amplifier 10 corresponds to the differential amplifier 2 in FIG. 1. Series-connected resistors R.sub.1 and R.sub.2 connected between an output 50 of the differential amplifier 10 and the ground represent the series-connected resistors R.sub.1 to R.sub.64 in FIG. 1. A connection node between the series-connected resistors R.sub.1 and R.sub.2 is connected to an inverted input of the differential amplifier 10.
Now, an operation will be described with reference to the simplified circuit diagram shown in FIG. 2. The reference voltage V.sub.O is supplied to a non-inverted input 20 of the differential amplifier 10, and the inverted input of the differential amplifier 10 is connected to receive a voltage V.sub.1 obtained by dividing the output voltage V.sub.REF of the differential amplifier 10 by a voltage divider formed of the resistors R.sub.1 and R.sub.2. At this time, the following relation holds: EQU V.sub.1 =V.sub.REF .multidot.R.sub.2 /(R.sub.1 +R.sub.2) (1)
Since the differential amplifier 10 operates to make the two inputs equal to each other, the following relation ultimately holds: EQU V.sub.O =V.sub.1 (2)
Therefore, the desired reference voltage V.sub.REF is expressed as follows: EQU V.sub.REF =V.sub.O .multidot.(R.sub.1 +R.sub.2)/R.sub.2 (3)
Accordingly, a desired voltage can be obtained by adjusting the values of the resistors R.sub.1 and R.sub.2.
Here, a capacitor 40 having a capacitance C is connected between the output 50 of the differential amplifier 10 and the ground, as a compensating capacitance for stabilizing the output voltage V.sub.REF.
In the prior art, when a plurality of different reference voltages are required, it was necessary to provide in a semiconductor device a plurality of circuits 61 to 63 each corresponding to the circuit 60 shown in FIG. 2, as shown in FIG. 3, and to make the resistance ratio between R.sub.1 and R.sub.2 in the circuits 61 to 63 different from one another, so that the circuits 61 to 63 generate different voltages. Therefore, when a plurality of different reference voltages are required, it is necessary to provide reference voltage generating circuits of the number equal to the number of the required reference voltages. This means that it is necessary to provide a plurality of circuits which are the same excluding the resistors, with the result that the chip size closely influencing the cost becomes large.
The size of the differential amplifier is not so large, but the resistor requires a large area, because it is necessary to make the resistance value large in order to minimize the electric power consumption. For example, when the resistance of R.sub.1 +R.sub.2 is 1000 K.OMEGA., the current flowing through these resistors R.sub.1 and R.sub.2 becomes 1 .mu.A. For a low consumed current, it is the ordinary practice that the resistance value of R.sub.1 +R.sub.2 is set in the range of 100 K.OMEGA. to 10 M.OMEGA.. For example, if the resistor of 1000 K.OMEGA. is formed of silicide, assuming that a sheet resistance of the silicide is about 10.OMEGA./.quadrature., the length of 200 mm is required with the width of 2 .mu.m. It would be understood that the resistor requires a large area.
Here, it may be supposed that it is sufficient if the resistor R.sub.1 shown in FIG. 2 is divided into a plurality of resistors R.sub.11 and R.sub.12 as shown in FIG. 4, so that a plurality of reference voltages V.sub.REF1 and V.sub.REF2 are generated. However, because of a compensating capacitance C.sub.2 added to stabilize V.sub.REF2, the voltage V.sub.1 fed back to the differential amplifier is delayed by the time constant of R.sub.11 .multidot.C.sub.12, so that a delay occurs in the control for the differential amplifier, and oscillation occurs in an extreme case. In this case, the reference voltage can be no longer utilized. Therefore, reference voltage generating circuits of the number equal to the number of required different reference voltages were required in the prior art.